Semiconductor devices and other microelectronic devices are typically manufactured on a wafer having a large number of individual dies (e.g., chips). Each wafer undergoes several different procedures to construct the switches, capacitors, conductive interconnects, and other components of the devices. For example, a wafer can be processed using lithography, etching, deposition, planarization, annealing, and other procedures that are repeated to construct a high density of features. One additional aspect of manufacturing microelectronic devices includes forming numerous doped regions on the wafer where specific types of atoms have been implanted to impart the desired electrical properties to the wafer. To reduce the size of the features on the wafer, the ions are typically implanted in shallow regions of the wafer and define shallow junctions.
FIG. 1 schematically illustrates a conventional ion beam implantor 10 for forming doped regions in a wafer 20. The ion beam implantor 10 includes an ion source 12 (shown schematically) for generating an ion beam 14, an accelerator 16 for accelerating the ions to a high enough velocity such that they have sufficient momentum to penetrate the surface of the wafer 20, a separator 18 for bending the ion beam 14 to separate undesired ions, and a wafer chuck 24 for holding the wafer 20. The ion beam 14 is typically a low energy beam for shallow junction implantation.
One drawback of the conventional ion beam implantor 10 is that the ion beam 14 impinges on only a small section of the wafer 20 at any given time and accordingly must be scanned across the wafer 20 to form the doped regions in the wafer 20. This process is relatively slow and, consequently, results in a relatively low throughput. Another drawback of the conventional ion beam implantor 10 is that the ion beam current is split by repelling positively charged ions. This causes significant losses during beam transportation to the wafer 20. Moreover, in low energy implant on ultra-shallow junction applications, the losses are even greater. Thus, a small fraction of the ion beam 14 reaches the wafer 20, which results in a low implantation rate and reduced throughput. Another drawback of the conventional ion beam implantor 10 is that the ion beam 14 causes sputtering on the wafer 20. Sputtering can cause retained dose saturation of the dopant and in turn sheet resistance saturation in the wafer 20. Yet another drawback of the conventional ion beam implantor 10 is that it is difficult to dope non-planar structures on the wafer 20. Accordingly, there is a need to improve the process of doping semiconductor wafers.